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 High Power SPDT Switch with Logic Control
CXG1134AEN
Description
The CXG1134AEN is a high power and high Isolation SPDT switch MMIC. This IC can be used in wireless communication systems. The CXG1134AEN can be operated by one CMOS control line. The Sony GaAs JFET process is used for low insertion loss and on-chip logic circuit. (Applications : Cellular handsets ; PDC, CDMA)
Features
Low insertion loss : 0.25dB @900MHz, 0.35dB @1.9GHz High linearity : IIP3 (typ.) = 70dBm 1 CMOS compatible control line Small package size : 10-pin VSON
Package
10 pin VSON (Plastic)
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings
(Ta = 25C) Bias voltage Control voltage Operating temperature Storage temperature VDD Vctl Topr Tstg 7 5 - 35 to + 85 - 65 to + 150 V V
C C
This IC is ESD sensitive device. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E05606-CR
CXG1134AEN
Block Diagram and Recommended Circuit
GND (recommended) Rctl (1k ) CTL Cbypass (100pF) GND 7 4 CRF (100pF) GND 8 F1 F2 3 GND 6 5 Cbypass (100pF) VDD
RF1
GND
9 F3 10 F4
2
GND
RF2 CRF (100pF)
1 CRF (100pF) GND (recommended)
RF3
When using this IC, the following external parts should be used : Rctl : CRF : Cbypass : This resistor is used to improve ESD performance. 1k is recommended. This capacitor is used for RF de-coupling and must be used for all applications. 100pF is recommended. This capacitor is used for DC line filtering. 100pF is recommended.
Truth Table
On Pass RF1 - RF2 RF1 - RF3 CTL H L F1 ON OFF F2 OFF ON F3 OFF ON F4 ON OFF
DC Bias Condition
Item Vctl (H) Vctl (L) VDD Min. 2.2 0 2.7 Typ. 3.0 -- 3.0
(Ta = 25C)
Max. 3.6 0.4 3.6 Unit V V V
-2-
CXG1134AEN
Electrical Characteristics
(Ta = 25C) Item Insertion loss Isolation VSWR Harmonics 1dB compression input power Switching speed Control current Bias current
*1
Symbol IL ISO. VSWR 2fo 3fo P1dB TSW Ictl IDD
Condition 900MHz 900MHz 900MHz
*1 *1
Min. 28
Typ. 0.25 32 1.2 - 75 - 75
Max. 0.50 1.4 - 60 - 60 5 30 100
Unit dB dB -- dBc dBc dBm s A A
VDD = 3.0V, 0/3V control Vctl (High) = 3V VDD = 3V
32
35 2 10 50
Pin = 30dBm, 900MHz, VDD = 3.0V, 0/3V control
-3-
CXG1134AEN
Package Outline
(Unit : mm)
10PIN VSON(PLASTIC)
+ 0.1 0.8 - 0.05 0.6 2.5 A 10 6 S 0.05 S
0.35 0.1 2.5
B
PIN 1 INDEX
1 0.4 0.8
5 x2 0.15 S B x4 0.15 S A B 0.35 0.1
Solder Plating 0.13 0.025 + 0.09 0.14 - 0.03 TERMINAL SECTION NOTE: 1) The dimensions of the terminal section apply to the ranges of 0.1mm and 0.25mm from the end of a terminal.
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE VSON-10P-01 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.013g
LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m
-4-
0.03 0.03 (Stand Off)
0.2 0.01
0.05 M S AB
0.225 0.03
Sony Corporation
0.5 0.2
2.7


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